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 FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
November 2007
FSDM311A Green Mode Fairchild Power Switch (FPSTM)
Features
Internal Avalanche-Rugged SenseFET Precision Fixed Operating Frequency: 67KHz Consumes Under 0.2W at 265VAC & No Load with Advanced Burst-Mode Operation Internal Start-up Circuit Pulse-by-Pulse Current Limiting Over-Voltage Protection (OVP) Overload Protection (OLP) Internal Thermal Shutdown Function (TSD) Auto-Restart Mode Under-Voltage Lockout (UVLO) with Hysteresis Built-in Soft-Start Secondary-Side Regulation
Description
The FSDM311A consists of an integrated Pulse Width Modulator (PWM) and SenseFET, and is specifically designed for high-performance, off-line, Switch-Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high-voltage power switching regulator that combines a VDMOS SenseFET with a voltage-mode PWM control block. The integrated PWM controller features include a fixed oscillator, Under-Voltage Lockout (UVLO) protection, Leading-Edge Blanking (LEB), an optimized gate turnon/turn-off driver, Thermal Shutdown (TSD) protection, and temperature-compensated precision-current sources for loop compensation and fault protection circuitry. When compared to a discrete MOSFET and controller or RCC switching converter solution, the FSDM311A device reduces total component count and design size and weight, while increasing efficiency, productivity, and system reliability. This device provides a basic platform that is well suited for the design of cost-effective flyback converters.
Applications
Charger & Adapter for Mobile Phone, PDA, & MP3 Auxiliary Power for White Goods, PC, C-TV, & Monitors
Related Resources
AN-4134: Design Guidelines for Off-line Forward Converters Using Fairchild Power Switch (FPSTM) AN-4137: Design Guidelines for Off-line Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4138: Design Considerations for Battery Charger Using Green Mode Fairchild Power Switch (FPSTM) AN-4140: Transformer Design Consideration for Offline Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4147: Design Guidelines for RCD Snubber of Flyback AN-4148: Audible Noise Reduction Techniques for FPSTM Applications
Ordering Information
Product Number
FSDM311A
Package
8DIP
Marking Code
DM311A
BVDSS
650V
fOSC
67KHz
RDS(ON)
14
All packages are lead free per JEDEC: J-STD-020B standard. FPSTM is a trademark of Fairchild Semiconductor Corporation.
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2 www.fairchildsemi.com
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Typical Application & Output Power Table
OUTPUT POWER TABLE Open Frame Product
FSDM311A
(1)
230VAC 15%
13W
(2)
85~265VAC
8W
Notes: 1. Maximum practical continuous power in an openframe design with sufficient drain pattern as a heat sinker, at 50C ambient. 2. 230VAC or 100/115VAC with doubler. Figure 1. Typical Flyback Application
Internal Block Diagram
Vstr 5 VCC 2 UVLO Voltage Ref Internal Bias 9/7V Vck DRIVER SQ R S/S 15mS BURST VBURL/ VBURH NC 4 Reset Min.20V VSD OVP TSD A/R 1 GND OLP SQ R LEB ILIM Vth SFET L H Drain 6,7,8
IDELAY IFB 5 A 400 A
OSC PWM
Vfb
3
Rsense
Figure 2.
Functional Block Diagram
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 2
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Pin Configuration
Figure 3.
8-Lead DIP Pin Assignments (Top View)
Pin Definitions
Pin #
1
Name
GND
Description
Ground. SenseFET source terminal on primary side and internal control ground. Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an internal switch during start-up (see the Internal Block Diagram in Figure 2). It is not until VCC reaches the UVLO upper threshold (9V) that the internal start-up switch opens and device power is supplied via the auxiliary transformer winding. Feedback. Inverting input to the PWM comparator with its normal input level lies between 0.5V and 2.5V. It has a 0.4mA current source connected internally, while a capacitor and optocoupler are typically connected externally. A feedback voltage of 4.5V triggers overload protection (OLP). There is a time delay while charging external capacitor CFB from 3V to 4.5V using an internal 5A current source. This time delay prevents false triggering under transient conditions, but allows the protection mechanism to operate under true overload conditions. No Connection. Start-up. This pin connects directly to the rectified AC line voltage source. At start-up, the internal switch supplies internal bias and charges an external storage capacitor placed between the Vcc pin and ground. Once the VCC reaches 9V, the internal switch stops charging the capacitor. SenseFET Drain. The drain pins are designed to connect directly to the primary lead of the transformer and are capable of switching a maximum of 650V. Minimize the length of the trace connecting these pins to the transformer to decrease leakage inductance.
2
Vcc
3
Vfb
4
NC
5
Vstr
6,7,8
Drain
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 3
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C, unless otherwise specified.
Symbol
VDRAIN VSTR VDG VGS IDM ID ID EAS VCC VFB PD TJ TA TSTG Drain Pin Voltage Vstr Pin Voltage Drain-Gate Voltage Gate-Source Voltage Drain Current Pulsed
Parameter
Value
650 650 650 20
Unit
V V V V A A A mJ V V W C C C
(3)
1.5 0.5 0.32 10 20 -0.3 to VSTOP 1.40 Internally limited -25 to +85 -55 to +150
Continuous Drain Current (TC=25C) Continuous Drain Current (TC=100C) Single Pulsed Avalanche Energy Supply Voltage Feedback Voltage Range Total Power Dissipation Operating Junction Temperature Operating Ambient Temperature Storage Temperature
(4)
Notes: 3. Repetitive rating: Pulse width is limited by maximum junction temperature. 4. L = 24mH, starting TJ = 25C
Thermal Impedance
TA=25C, unless otherwise specified.
Symbol
8DIP JA JC
Parameter
Junction-to-Ambient Thermal Impedance Junction-to-Case Thermal Impedance
(6) (5)
Value
88.84 13.94
Unit
C/W C/W
Notes: 5. Free standing with no heatsink; without copper clad. (Measurement Condition - just before junction temperature TJ enters into OTP). 6. Measured on the DRAIN pin close to plastic interface. 7. All items are tested with the standards JESD 51-2 and 51-10 (DIP).
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 4
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Electrical Characteristics
TA=25C unless otherwise specified.
Symbol SENSEFET SECTION
IDSS RDS(ON) gfs CISS COSS CRSS td(on) tr td(off) tf Qg Qgs Qgd fOSC fOSC DMAX VSTART VSTOP IFB tS/S VREF VREF/T
Parameter
Conditions
VDS=650V, VGS=0V VDS=520V, VGS=0V, TC=125C
(8)
Min.
Typ.
Max.
25 200
Unit
Zero-Gate-Voltage Drain Current Drain-Source On-State Resistance Forward Trans-Conductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain (Miller) Charge Switching Frequency Switching Frequency Variation Maximum Duty Cycle UVLO Threshold Voltage Feedback Source Current Internal Soft-Start Time Reference Voltage
(10) (9)
mA S pF
VGS=10V, ID=0.5A VDS=50V, ID=0.5A VGS=0V, VDS=25V, f=1MHz 1.0
14 1.3 162 18 3.8 9.5 19 33 42 7.0
19
VDS=325V, ID=1.0A
ns
VGS=10V, ID=1.0A, VDS=325V
3.1 0.4 61 67 5 60 67 9 7 0.40 15 4.5 0.3 8 6 0.35 10 4.2 73 10 74 10 8 0.45 20 4.8 0.6
nC
CONTROL SECTION
KHz % % V V mA ms V mV/C -25C TA 85C VFB=GND VFB=GND 0V VFB 3V
Reference Voltage Variation (9, 10) with Temperature
-25C TA 85C
BURST MODE SECTION
VBURH VBURL VBUR(HYS) Burst Mode Voltage TJ=25C Hysteresis Peak Current Limit Thermal Shutdown Temperature Shutdown Feedback Voltage Over-Voltage Protection Shutdown Delay Current 3V VFB VSD
(10)
0.6 0.45
0.7 0.55 150
0.8 0.65
V V mV A C V V A mA A
PROTECTION SECTION
ILIM TSD VSD VOVP IDELAY IOP ICH di/dt=90mA/s 0.500 0.575 0.650 125 4.0 20 4 5 1.5 450 550 6 3.0 650 145 4.5 5.0
TOTAL DEVICE SECTION
Operating Supply Current (control part only) VCC 16V Start-up Charging Current VCC=0V, VSTR=50V
Notes: 8. Pulse test: Pulse width 300s, duty 2%. 9. These parameters, although guaranteed, are tested in EDS (wafer test) process. 10. These parameters, although guaranteed, are not 100% tested in production.
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2 www.fairchildsemi.com 5
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Typical Performance Characteristics
Normalized at TA = 25C.
1.15 1.10 1.05
1.15 1.10 1.05
VREF
0.95 0.90 0.85 -50 0 50 100 150
IOP
1.00
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 4.
Reference Voltage (VREF) vs. TA
Figure 5.
Operating Supply Current (IOP) vs. TA
1.15 1.10 1.05
1.15 1.10 1.05
VSTAART
1.00 0.95 0.90 0.85 -50 0 50 100 150
VSTOP
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 6.
Start Threshold Voltage (VSTART) vs. TA
Figure 7.
Stop Threshold Voltage (VSTOP) vs. TA
1.15 1.10 1.05 1.00 0.95 0.90 0.85 -50 0 50 100 150
1.15 1.10 1.05
DMAX
fOSC
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 8.
Operating Frequency (fOSC) vs. TA
Figure 9.
Maximum Duty Cycle (DMAX) vs. TA
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 6
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Typical Performance Characteristics (Continued)
Normalized at TA = 25C.
1.15 1.10 1.05
1.15 1.10 1.05
ILIM
1.00 0.95 0.90 0.85 -50 0 50 100 150
IFB
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 10.
Peak Current Limit (ILIM) vs. TA
Figure 11.
Feedback Source Current (IFB) vs. TA
1.15 1.10 1.05
1.15 1.10 1.05
IDELAY
1.00 0.95 0.90 0.85 -50 0 50 100 150
VSD
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Temperature [C]
Figure 12.
Shutdown Delay Current (IDELAY) vs. TA
Figure 13. Shutdown Feedback Voltage (VSD) vs. TA
1.15 1.10 1.05
VOVP
1.00 0.95 0.90 0.85 -50 0 50 100 150
Temperature [C]
Figure 14.
Over-Voltage Protection (VOVP) vs. TA
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 7
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Functional Description
1. Start-up: At start-up, the internal high-voltage current source supplies the internal bias and charges the external VCC capacitor, as shown in Figure 15. When VCC reaches 9V, the device starts switching and the internal high-voltage current source stops charging the capacitor. The device is in normal operation provided VCC does not drop below 7V. After start-up, the bias is supplied from the auxiliary transformer winding. 2. Feedback Control: The FSDM311A is the voltagemode controlled device, as shown in Figure 17. Usually, an opto-coupler and shunt regulator, such as KA431, are used to implement the feedback network. The feedback voltage is compared with an internally generated sawtooth waveform that directly controls the duty cycle. When the shunt regulator reference pin voltage exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, the feedback voltage VFB is pulled down, and it reduces the duty cycle. This happens when the input voltage increases or the output load decreases.
Figure 15.
Internal Start-up Circuit Figure 17. PWM and Feedback Circuit
Calculating the VCC capacitor is an important step in design with the FSDM311A. At initial start-up, the maximum value of start operating current ISTART is about 100A, which supplies current to UVLO and VREF blocks. The charging current IVcc of the VCC capacitor is equal to ISTR - 100A. After VCC reaches the UVLO start voltage, only the bias winding supplies VCC current to the device. When the bias winding voltage is not sufficient, the VCC level decreases to the UVLO stop voltage and the internal current source is activated again to charge the VCC capacitor. To prevent this VCC fluctuation (charging/discharging), the VCC capacitor should be chosen for a value between 10F and 47F.
3. Leading-Edge Blanking (LEB): At the instant the internal SenseFET is turned on, the primary-side capacitance and secondary-side rectifier diode reverse recovery typically cause a high-current spike through the SenseFET. Excessive voltage across the RSENSE resistor leads to incorrect pulse-by-pulse current limit protection. To avoid this, a leading-edge blanking (LEB) circuit disables pulse-by-pulse current limit protection block for a fixed time (tLEB) after the SenseFET turns on. 4. Protection Circuit: The FSDM311A has several protective functions, such as overload protection (OLP), over-voltage protection (OVP), under-voltage lockout (UVLO), and thermal shutdown (TSD). Because these protection circuits are fully integrated in the IC without external components, the reliability is improved without increasing costs. Once a fault condition occurs, switching is terminated and the SenseFET remains off, which causes VCC to fall. When VCC reaches the UVLO stop voltage, VSTOP (7V), the protection is reset and the internal high-voltage current source charges the Vcc capacitor via the Vstr pin. When VCC reaches the UVLO start voltage, VSTART (9V), the device resumes normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated.
Figure 16. Charging VCC Capacitor through VSTR
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
Figure 18. Protection Block
www.fairchildsemi.com 8
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
4.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is operating normally, the overload protection (OLP) circuit can be activated during the load transition. To avoid this undesired operation, the OLP circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. If the output consumes more than the maximum power determined by ILIM, the output voltage (VO) decreases below its rating voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (VFB). If VFB exceeds 3V, the feedback input diode is blocked and the 5A current source (IDELAY) starts to charge CFB slowly up to VCC. In this condition, VFB increases until it reaches 4.5V, when the switching operation is terminated, as shown in Figure 19. The shutdown delay time is the time required to charge CFB from 3V to 4.5V with 5A current source.
VFB Over Load Protection 4.5V
Figure 20.
Internal Soft-Start
6. Burst Operation: To minimize the power dissipation in standby mode, the FSDM311A enters burst mode operation. As the load decreases, the feedback voltage decreases. The device automatically enters burst mode when the feedback voltage drops below VBURL (0.55V). At this point, switching stops and the output voltages start to drop. This causes the feedback voltage to rise. Once is passes VBURH (0.70V), switching starts again. The feedback voltage falls and the process repeats. Burst mode operation alternately enables and disables switching of the power MOSFET to reduce the switching loss in standby mode.
3V
t12= CFB (V(t2)-V(t1)) / IDELAY t1
t12 = C FB V ( t 2 ) - V ( t1 ) ; I DELAY
t2
t
I DELAY = 5 A , V (t1 ) = 3V , V ( t 2 ) = 4 . 5V
Figure 21. Overload Protection (OLP)
Vo
Voset
Burst Operation Block
Figure 19.
4.2 Thermal Shutdown (TSD): The SenseFET and the control IC are integrated, making it easier for the control IC to detect the temperature of the SenseFET. When the temperature exceeds approximately 145C, thermal shutdown is activated. 5. Soft-Start: The FPS has an internal soft-start circuit that slowly increases the feedback voltage with the SenseFET current right after it starts up. The typical soft-start time is 15ms, as shown in Figure 20, where progressive increment of the SenseFET current is allowed during the start-up phase. The soft-start circuit progressively increases current limits to establish proper working conditions for transformers, inductors, capacitors, and switching devices. It also helps to prevent transformer saturation and reduces the stress on the secondary diode.
VFB
0.7V 0.55V
Ids
Vds
t
Figure 22.
Burst Operation Function
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 9
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Application Information
Methods of Reducing Audible Noise
Switching-mode power converters have electronic and magnetic components that generate audible noise when the operating frequency is in the range of 20~20,000Hz. Even though they operate above 20kHz, they can make noise, depending on the load condition. Designers can employ several methods to reduce noise.
Glue or Varnish The most common method involves using glue or varnish to tighten magnetic components. The motion of core, bobbin, and coil; and the chattering or magnetostriction of core, can cause the transformer to produce audible noise. The use of rigid glue and varnish helps reduce transformer noise, but can crack the core. This is because sudden changes in the ambient temperature cause the core and the glue to expand or shrink at a different rate.
Figure 23.
Equal Loudness Curves
Ceramic Capacitor Using a film capacitor instead of a ceramic capacitor as a snubber capacitor is another noise-reduction solution. Some dielectric materials show a piezoelectric effect, depending on the electric field intensity. A snubber capacitor becomes one of the most significant sources of audible noise. It is possible to use a Zener clamp circuit instead of an RCD snubber for higher efficiency as well as lower audible noise.
Adjusting Sound Frequency Moving the fundamental frequency out of the 2~4kHz range another method of reducing perceptible noise. Generally, humans are more sensitive to noise in the range of 2~4kHz. When the fundamental frequency of noise is located in this range, it is perceived as louder, although the noise intensity level is identical (refer to Figure 23, Equal Loudness Curves). If burst-mode operation is suspected to be a source of noise, this method may be helpful. If the frequency of burst-mode operation lies between 2~4 kHz, adjusting the feedback loop can shift the frequency. To reduce the burst operation frequency, increase a feedback gain capacitor (CF), opto-coupler supply resistor (RD), and feedback capacitor (CB); and decrease a feedback gain resistor (RF), as shown in Figure 24.
Figure 24. Typical Feedback Network of FPSTM
Reference Materials
AN-4134: Design Guidelines for Off-line Forward Converters Using Fairchild Power Switch (FPSTM) AN-4137: Design Guidelines for Off-line Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4138: Design Considerations for Battery Charger Using Green Mode Fairchild Power Switch (FPSTM) AN-4140: Transformer Design Consideration for Offline Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4147: Design Guidelines for RCD Snubber of Flyback AN-4148: Audible Noise Reduction Techniques for FPSTM Applications
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 10
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
Physical Dimensions
9.83 9.00
6.67 6.096
8.255 7.61
5.08 MAX
3.683 3.20
7.62
0.33 MIN (0.56) 2.54
3.60 3.00 0.56 0.355 1.65 1.27
7.62
0.356 0.20 9.957 7.87
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BA B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994 E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 25.
8-Lead DIP Package
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 11
FSDM311A -- Green Mode Fairchild Power Switch (FPSTM)
(c) 2007 Fairchild Semiconductor Corporation FSDM311A * Rev.1.0.2
www.fairchildsemi.com 12


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